INNOVATIVE INTEGRATION Industrial Partner

X5-COM - Innovative Integration X5-COM CPU Board with PCI Express XMC Module...

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Part Number:
X5-COM
Model Number:
X5-COM
Make:
INNOVATIVE INTEGRATION
Lead Time:
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Qty In Stock:
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Innovative Integration X5-COM CPU Board with PCI Express XMC Module with Four Ethernet/SRIO/Gigabit Serial Ports, Virtex5 SXT or FXT FPGA and 512MB Memory Simple Type: CPU Board

The X5-COM is an XMC IO module featuring four 4.125 Gbps serial ports directly connected to a Virtex5 FPGA computing core with DRAM and SRAM memory, and PCI Express host interface. With supporting IP, the X5-COM is ideal for computational intensive applications for Ethernet packet processing, encryption and test. A Xilinx Virtex5 FPGA with 512MB DDR2 DRAM and 4MB QDR-II SRAM memory provides a very high performance computing core. Either the SXT95 or FXT100 Virtex5 FPGA is available. The FPGA has four Ethernet MACs and 2 PowerPCs (FX100T) in the FPGA logic array. The X5 XMC modules couple Innovative's powerful Velocia architecture with a high performance, 8-lane PCI Express interface that provides over 1 GB/s sustained transfer rates to the host. Private links to host cards with > 800 MB/s capacity using P16 are provided for system integration. The X5 family can be fully customized using VHDL and MATLAB using the FrameWork Logic toolset. The MATLAB BSP supports real-time hardware-in-the-loop development using the graphical, block diagram Simulink environment with Xilinx System Generator.

Download the datasheet (PDF)

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Features

  • >1 GB/s, 8-lane PCI Express Host Interface
  • 4 Rocket IO links for data plane using P16
  • 4MB QDR-II SRAM for computations
  • 512MB DDR2 DRAM supporting 4 GB/s transfer rates
  • Conduction cooling and thermal monitoring
  • Four communications ports Gigabit Ethernet, Aurora, Infiniband, Serial Rapid IO (requires supporting IP in FPGA)
  • FX100T: 2 PowerPC+ 256 DSP MACs
  • Industry-standard SFP modules support up to 4.125 Gbps over Copper or Fiber Optic cables (rates depend on FPGA speed and cable)
  • PCI Express (VITA 42.3)
  • SX95T: 640 DSP MACs
  • Xilinx Virtex5 SX95T or FX100T FPGA
  • XMC Module (75x150 mm)

Specifications

    General
  • Block RAMs: SX95T: 488 (8748 Kbits,) FX100T: 456 (8208 Kbits)
  • Cables: CAT6 Ethernet cable to ~1Gbps Fiber to 4.125 Gbps
  • CLB: SX95T: 14720, FX100T: 16000
  • Configuration: SelectMAP from on-board flash EEPROM - JTAG during development
  • Data Rates (Max): 4.125 Gbps (FX100T) 3.2 Gbps (SX100T) simultaneously in each direction, per port
  • Devices: Xilinx Virtex5, Option -0: XC5VSX95T-1FF1136C, Option -1: XC5VFX100T-1FF1136C
  • DRAM Controller: Controller for DRAM implemented in logic. DRAM is controlled as a single bank.
  • DRAM Rate: 4.2 GB/s storage/retrieval rate sustained
  • DRAM Size: 512MB total 4 devices @ 64Mx16 each
  • DRAM Type: DDR2 DRAM
  • DSP48E cores: SX95T: 640, FX100T: 256
  • Ethernet MAC: 4 per device, 802.3-2002 compliant, UNH verified, Supports jumbo frames, DCR bus to microprocessors
  • Flip-Flops: SX95T: 58880, FX100T: 64000
  • Interface: SFP module (Small Form-factor Pluggable)
  • IO Type: CML
  • Pins: 1136
  • Ports: 4 gigabit serial ports in FPGA (a.k.a. Rocket IO or GTP/GTX ports)
  • Processor: Xilinx Virtex5
  • Rocket IO: SX95T: 16 lanes @ 3.2 Gbps, FX100T: 16 lanes @ 4.125 Gbps
  • Size: ~10M gate equivalent (standard device)
  • Speed Grade: -1 (commercial)
  • SRAM Controller: Two independent SRAM controllers. implemented in FPGA logic
  • SRAM Rate: 3.2 GB/s storage/retrieval max rate sustained
  • SRAM Size: 4 MB total 2 devices @ 512Kx32 each
  • SRAM Type: QDR-II
  • Transmission Distance: CAT6 to ~10 meters Fiber to 10 km (module and cable dependent)

 

Applications

  • None Available

Aliases

  • None Available